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Fifth International Workshop on
High-level Parallel Programming and Applications (HLPP 2011)
Tokyo, September 18, 2011
Affiliated to ICFP 2011
Sponsored by ACM SIGPLAN
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Aims and Scope
As processor and system manufacturers adjust their roadmaps
towards increasing levels of both inter and intra-chip parallelism,
so the urgency of reorienting the mainstream software industry
towards these architectures grows.
At present, popular parallel and distributed programming
methodologies are dominated by low-level techniques such
as send/receive message passing, or equivalently unstructured
shared memory mechanisms.
Higher-level, structured approaches offer many possible
advantages and have a key role to play in the
scalable exploitation of ubiquitous parallelism.
This workshop provides a forum for discussion and
research about such high-level approaches to parallel programming.
Topics
We welcome submission of original, unpublished papers in English on
topics including (but not limited to) the following aspects of
multi-core, parallel, distributed, grid and cloud computing:
- High-level programming and performance models (BSP, CGM, LogP, MPM, etc.) and tools
- Declarative parallel programming methodologies
- Algorithmic skeletons and constructive methods
- Declarative parallel programming languages and libraries:
semantics and implementation
- Verification of declarative parallel and distributed programs
- Applications using high-level languages and tools
- Teaching experience with high-level tools and methods
Programme Committee
- PC Chair: Kiminori Matsuzaki (Kochi University of Technology, Japan)
- PC Members:
- Jeremiah Willcock (Indiana University, USA)
- Pavan Balaji (Argonne National Laboratory, USA)
- Rita Loogen (University of Marburg, Germany)
- Shinichi Yamagiwa (Kochi University of Technology, Japan)
- Susanna Pelagatti (University of Pisa, Italy)
- Sven-Bodo Scholz (University of Herfordshire, UK)
- Tasuku Hiraishi (Kyoto University, Japan)
- Wei Ngan Chin (National University of Singapore, Singapore)
Program
- 12:30-14:00 Lunch
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14:00-15:30 Welcome & Invited Talk
Towards Auto-tuning Description Language to Heterogeneous Computing Environment
Takahiro Katagiri
- 15:30-16:00 Tea Break
- 16:00-17:00 Session 1: Skeletal Parallelism & Algorithm
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Cache Size in a Cost Model for Heterogeneous Skeletons
Khari Armih, Greg Michaelson, Phil Trinder
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An Efficient Skew-insensitive Algorithm for Join Processing on Grid Architectures
Mohamad Al Hajj Hassan, Mostafa Bamha, Frédéric Loulergue
- 17:00-17:15 Short Break
- 17:15-18:15 Session 2: Formal Analysis & Type System
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Formally Specifying and Analyzing a Parallel Virtual Machine for Lazy Functional Languages Using Maude
Georgios Fourtounis, Peter Csaba, Olveczky, Nikolaos Papaspyrou
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Type System for a Safe Execution of Parallel Programs in BSML
Fr&ecaute;déric Gava, Louis Gesbert, Frédéric Loulergue
Organizer
Kiminori Matsuzaki (Kochi University of Technology, Japan)
Past HLPP Workshops